⚖️ RISC-V Formal

ISA Verification, Instruction Semantics, Hardware Proofs, Architecture Validation

Don't Repeat Yourself, Coarse-Grained Circuit Deduplication to Accelerate Sim
danglingpointers.substack.com·16h·
Discuss: Substack
🖥️Game Emulation
Renesas RA4C1 Arm Cortex-M33 MCU targets Smart Meters and energy-efficient IoT applications
cnx-software.com·22h
🔌Microcontrollers
Quantifying Thermal Gradient Impact on 40-Layer Stack Die Reliability through Bayesian Network Analysis
dev.to·13h·
Discuss: DEV
⚙️Modern Assembly
Saleae Analyzer for the BDM protocol
zetier.com·2d
🔬Binary Analysis
A primer on code generation in Cranelift by Benjamin Bouvier
bouvier.cc·3d
🦀Rust Macros
HigherOrderCO/HVM3
github.com·5h
🔗Functional Compilers
SafeLLM: Unlearning Harmful Outputs from Large Language Models against Jailbreak Attacks
arxiv.org·1d
💻Local LLMs
Back to the 90s on Real Hardware
hackaday.com·1h
🕹️Retro Gaming
LGA1700 2u coolers
reddit.com·1d·
Discuss: r/homelab
🧲RISC-V Preservation
Get Back To WARP
binary.ninja·13h
🧪Binary Fuzzing
AI Code Generation: Trust and Verify, Always
thenewstack.io·16h
⚙️Proof Engineering
ReVault Flaw Exposed Millions of Dell Laptops to Malicious Domination
darkreading.com·10h
🔓Hacking
Lobsters Interview with Matklad
lobste.rs·16h·
Discuss: Lobsters
🦀Rust Macros
My tips for using LLM agents to create software
efitz-thoughts.blogspot.com·5h·
Discuss: Hacker News
⚡Proof Automation
LLMs are NOT Turing Complete (at train time), we need "train time recurrence"
fchaubard.github.io·4h·
Discuss: Hacker News
📼Tape Combinators
Learn every individual feature your CPU supports with SpecSeek
github.com·12h·
Discuss: Hacker News
⚡Performance Tools
Dell T320 H310 RAID and IT Mode
etbe.coker.com.au·14h
🔒Secure Boot
Fuzzing Hardware Like Software (2021)
arxiv.org·3d·
Discuss: Hacker News
🧪Hardware Fuzzing
Micropycelium - prototype routable mesh network for ESP32
hackster.io·21h
🕸️Mesh Networking
Scheme Basics
courses.cs.washington.edu·18h·
Discuss: Hacker News, Hacker News
🧠Lisp Dialects